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ASIC verification and validation openings

Post time:  2010-03-04
 

Author:eetengr

Points:  135

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Design Verification

 

         BE, BS, ME, MS in Electronics or Computer Science with 3 to 6 years of relevant industry experience.

         Proficient in one or more HVL's (System Verilog, Vera, e, System C or C++) with experience on constraint random verification.

         Strong in protocols like AHB/AXI, PCIe, USB, I2C, Ethernet or other networking protocols.

         Experience with SOC verification or IP development using VMM/OVM/RVM/eRM with knowledge of code coverage & functional coverage.

         Good in Verilog/VHDL and scripting languages.

         Knowledge of assertions or formal verification is an added advantage

 

Silicon Validation

         Bachelor’s degree in EE / CS with 5 years of progressive experience or Master's degree with 3 years of related experience

         Experience with ARM Architecture and peripherals interfaces such as USB, SDIO, I2C, I2S, NAND, SDR, DDR, MMC etc.

         Able to work closely with ASIC design team on test and validation plans to plan and implement firmware modules for a full validation of functional blocks, specifications, test bench designs using C/C++ & ARM assembly.

         Hands-on experience with lab equipments such as oscilloscopes, logic analyzers, embedded firmware debugging tools, etc used in resolving embedded firmware issues.

         Experience with lab end to end bring-up (initial to qual to production) of complicated ASICs.

         Experience with ASIC FPGA prototyping tools is a plus. 

Interested people can send across their resumes to jobs@smartplayin.com

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Reply: ASIC verification and validation openings

Post time:  2010-03-15
 

Author:Visitor null

Dear Sir/Madam,

I am working as a ASIC front end design and verification engineer.
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