Growth Expectations for 2008

Every year the EDA Consortium invites members of the Board ( leading EDA vendors and one or two small EDA company vendors) in the EDA market to speculate on the growth of the industry in the coming year. There is usually a high level theme around which the panel is loosely woven and this year was no different, with the theme generally being in the context of EDA’s role in value creation in the fabless model.  Represented on the panel were the CEO of Synopsys, Cadence, Mentor Graphics, MIPS, Denali and Jasper. Neither Synopsys nor Mentor Graphics’ CEOs could publicly predict the next quarter or the future growth or comment on their specific companies because of SEC (Securities and Exchange commission ) rules but they did provide some directional information on where the likely growth spots are for 2008.

The current outlook for EDA industry growth in 2008 is for approximately 2%-4%, slow but stable.  And the panelists were guardedly optimistic that the industry would see even this much growth.  Several panelists agreed that the threat of global recession would not have a direct effect on the health of the EDA industry.  Keep in mind though that the 2%-4% is for worldwide EDA growth. As design and manufacturing is now so geographically dispersed, particular geographic regions could grow at very different rates.

Semiconductor and systems companies historically, have tended to design their way out of a recession and panelists seemed to confirm this view by stating that they hadn’t personally seen any major design cancellations at their customers yet.  As we move towards the upcoming 45nm technology  node, leaders and those in the upper mainstream of the semiconductor and systems markets ( EDA customers in short) will have to invest in tools and methodologies to support the next node or face becoming laggards in the next node.

EDA tools sales in the last 15 years have mirrored the arrival of the semiconductor industry at each node by the lag of a year or two. Historically, leading edge semiconductor companies invested in in-house tools to make up for the lack of commercial EDA tools. At that point, the return on investment (ROI) in building the tool internally is greater either because the tool doesn’t exist in commercial form or building it in house gives the semiconductor company a huge design and/or verification advantage over its competition. Since the ROI is visible in the end market in terms of volume shipped or value earned, having a design advantage is significant. As time goes on though, the tool matures and then the semiconductor company has the option to either license it out or to allow the EDA partner to commercialize it. Again this is a path that has been followed over and over in all parts of the EDA value chain.

As the CEO of Jasper pointed out, there are two kinds of ROI that influence customer buying behavior. Big ROI- the kind that comes with paradigm shifts and little ROI – the value that comes from using point tools. At various times in the history of EDA, leading EDA vendors have tried to lock their customers into their tool flow and tried to shut the so called “Darringer Door”. However, since point tools usually represent some kind of innovation in the flow that delivers significant ROI, (the term “little” maybe somewhat misleading), the “all you can eat” style of tool buffets have never really succeeded in shutting the door fully.  According to statistics from the panel, this discretionary EDA spending is approximately 20% of the EDA spending budget. The EDA tool spend is usually a line item in the R &D expenditure lines that show up in the balance sheets of public companies.

In the next post I will look at the growth areas that were highlighted by the panelists.